1. Technical Field
Various embodiments of the inventive concept relate to a semiconductor integrated circuit, and more particularly, to a resistive memory apparatus, an operating method thereof, and a system having the same.
2. Related Art
Semiconductor memory apparatuses are largely divided into volatile memory apparatuses and non-volatile memory apparatus.
Typical examples of the volatile memory apparatuses may be dynamic random access memories (DRAMs). The DRAM periodically refreshes a state of a cell capacitor constituting a unit memory cell to retain stored data. The DRAM may perform a read/write operation at high speed, but the DRAM has high power consumption.
Meanwhile, a non-volatile memory apparatus may include a flash memory apparatus and a resistive memory apparatus. The flash memory apparatus has a non-volatile property to retain data even in power off, but the flash memory apparatus have short lifespan with the limitation of the number of times of programming.
The resistive memory apparatus has advantages of the DRAM and the flash memory apparatus.
Typical examples of resistive memory devices are a phase-change random access memory (PCRAM) using a chalcogenide compound, a ferroelectric RAM (FRAM) using a ferroelectric capacitor, a resistive RAM (ReRAM) using metal oxide, and a magnetoresistive RAM (MRAM) using perovskite.
Among the resistive memory apparatuses, the PCRAM may determine data to be stored in the selected memory cell based on a crystalline state of a phase-change material. By heating the phase-change material, a phase of the phase-change material may be changed, and thus the resistance state may be controlled. The PCRAM has a unit memory cell including an access device and the phase-change material as a resistive device for storing data. Resistance of the phase-change material may increase due to various causes, and such phenomenon is called resistance drift. The resistance drift may be intensified, as a resistance of the phase-change material becomes high.
FIG. 1 is a view for explaining a fail due to the resistance drift.
A memory cell that may store two bits or more in one memory cell is called a multilevel cell (MLC). FIG. 1 illustrates change in resistance of a multilevel cell that stores data of four levels R1, R2, R3, and R4 as time passes.
As the memory cell has a high-resistance state (i.e., in order of R4>R3>R3 >R1), the resistance drift is serious. A fail may occur from a point in time ‘A’ when a resistance of the memory cell programmed to have a resistance of R3 exceeds a reference resistance Ref.
In other words, a time denoted by ‘A’ is referred to as a data retention time (or a drift retention time) of the memory cell.
A method for preventing a fail due to the resistance drift are in demand.